Suwon, South Korea

Dongkyun Lim

This inventor holds 2 USPTO granted patents and 7 published patent applications. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dongkyun Lim. Retrieved from https://idiyas.com/inventor/dongkyun-lim-nqnbd4eg

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

Average Co-Inventor Count = 6.0

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Dongkyun Lim: Semiconductor Device Inventor

Introduction

Dongkyun Lim is an inventor based in Suwon, South Korea, and is associated with Samsung Electronics Co., Ltd. His work includes a patented semiconductor device design focused on landing pad structures.

Latest Patents

Lim is credited with 1 patent, titled “Semiconductor Devices Having Landing Pad Structures.” The invention describes a semiconductor device with an active region and cell gate and bitline structures. A contact plug sits between the bitline structures, while a landing pad above it consists of lower and upper pads. The upper pad contains a cavity with a conductive pattern, and an insulating pattern structure contacts both a bitline structure and the landing pad structure. The design brings together these components in a semiconductor device architecture.

Career Highlights

Lim’s listed patent reflects work in semiconductor device structures at Samsung Electronics Co., Ltd. The invention addresses the arrangement of landing pads, conductive patterns, and insulating structures within a device.

Collaborations

Lim’s listed coworkers include Sunwoo Heo and Soobin Kim. Their names are associated with his professional context, though the supplied information does not specify their roles in the patent.

Conclusion

Dongkyun Lim’s patent documents a semiconductor device design centered on landing pad structures and their integration with other device components.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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