Cupertino, CA, United States of America

Dieter Muller

This inventor holds 1 USPTO granted patent. Top assignee: Kla Tencor Corporation. Active years: 2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dieter Muller. Retrieved from https://idiyas.com/inventor/dieter-muller-d8f8ijgx

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2014

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1 patent (USPTO):Explore Patents

Title: Dieter Muller: Semiconductor Inspection Innovation

Introduction

Dieter Muller is an inventor associated with Cupertino, California, and Kla Tencor Corporation, now known as KLA Corporation. His patent work addresses optical inspection of specimens such as semiconductor wafers.

Latest Patents

Muller is named on one patent, Grazing and Normal Incidence Interferometer Having Common Reference Surface. The invention describes a system for inspecting specimens, including dual-sided semiconductor wafers. It uses diffraction gratings to direct and combine light wavefronts, reflective surfaces for the optical channels, and a camera system to capture the resulting measurements. The system also incorporates vibration damping and arrangements for scanning and repositioning a specimen, then stitching scans together. This approach can enable the use of smaller, less expensive optical elements.

Career Highlights

Muller’s listed patent reflects work on interferometric inspection technology for semiconductor manufacturing. His association with KLA Corporation connects his invention to a company focused on process control and inspection systems.

Collaborations

The provided information lists Daniel Ivanov Kavaldjiev and Rainer Schierle as Muller’s coworkers. It does not specify their roles in the patent or whether they collaborated on this invention.

Conclusion

Dieter Muller’s patent describes an optical inspection system designed to scan semiconductor specimens efficiently while addressing vibration and equipment-size considerations. His listed portfolio includes 1 patent.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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