Didier Seropian

Title: Innovations by Didier Seropian

Introduction

Didier Seropian is a notable inventor based in Anbibes, France. He has made significant contributions to the field of integrated circuit design, holding 2 patents that showcase his innovative approach to technology.

Latest Patents

His latest patents include methods for generating a user interface for timing budget analysis of integrated circuit designs. In one embodiment of the invention, a method includes reading an automatically generated timing budgeting file, which contains timing budget information for various partitions of an integrated circuit design. The invention graphically displays a time budgeting debug window on a display device and a timing budget analyzer window in response to the selection of a signal path in a path list window pane. The timing budget analyzer window visually compares timing budgets and timing delays of a selected path. Additionally, the time budgeting debug window features a button with a path category menu to display signal paths that meet a selected path category, along with a path list window pane that shows a list of signal paths through the partitions.

Career Highlights

Didier Seropian is currently employed at Cadence Design Systems, Inc., where he continues to develop innovative solutions in the realm of integrated circuit design. His work has been instrumental in enhancing the efficiency and effectiveness of timing budget analysis.

Collaborations

Throughout his career, Didier has collaborated with talented professionals, including Vivek Bhardwaj and Oleg Levitsky. These collaborations have contributed to the advancement of technology in their field.

Conclusion

Didier Seropian's contributions to integrated circuit design through his patents and collaborations highlight his role as an influential inventor in the technology sector. His innovative methods continue to shape the future of circuit design and analysis.