Hillsboro, OR, United States of America

Dhruv Singh

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Intel Corporation. Active years: 2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dhruv Singh. Retrieved from https://idiyas.com/inventor/dhruv-singh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2018

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1 patent (USPTO):Explore Patents

Title: Dhruv Singh: Inventor in Reliability Monitoring

Introduction

Dhruv Singh is an inventor associated with Hillsboro, Oregon, and Intel Corporation. His patent work addresses the early detection of reliability degradation in electronic circuits.

Latest Patents

Singh is associated with 1 patent: “Early Detection of Reliability Degradation Through Analysis of Multiple Physically Unclonable Function Circuit Codes.” The patent describes an apparatus with multiple circuits, each designed to produce a unique signature code based on manufacturing tolerances. Error circuitry detects a potential reliability issue by identifying changes in the signature codes across those circuits.

Career Highlights

Singh’s listed invention focuses on using physically unclonable function circuit codes to monitor changes that may indicate degradation. This approach connects manufacturing variation with circuit reliability assessment.

Collaborations

The listed coworkers associated with Singh include Suraj Sindia and Robert F. Kwasnick.

Conclusion

Dhruv Singh’s patent work at Intel Corporation highlights a method for detecting possible circuit reliability degradation through analysis of changing signature codes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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