David Yepejian Lepejian

Title: Innovations by David Yepejian Lepejian

Introduction

David Yepejian Lepejian is an accomplished inventor based in Palo Alto, California. He has made significant contributions to the field of integrated circuit testing and manufacturing. With a total of two patents to his name, his work focuses on improving efficiency and accuracy in semiconductor processes.

Latest Patents

David's latest patents include a method for using wafer navigation to reduce testing times of integrated circuits. This innovative method involves selecting a die with a known defect and analyzing its connectivity and defect information. By determining the probability of failure for each known defect, the testing sequence is modified to prioritize tests that directly relate to the defects. His second patent is a method for using inspection data to improve the throughput of steppers during the manufacturing of integrated circuit dies. This method eliminates any die with fatal defects from the stepper operations, thereby enhancing the overall manufacturing process.

Career Highlights

David works at Heuristic Physics Laboratories, where he applies his expertise in integrated circuit technology. His innovative approaches have contributed to advancements in the semiconductor industry. His work is characterized by a commitment to improving testing methodologies and manufacturing efficiency.

Collaborations

David collaborates with John M Caywood, leveraging their combined expertise to drive innovation in their projects. Their partnership has resulted in significant advancements in the field of integrated circuits.

Conclusion

David Yepejian Lepejian's contributions to integrated circuit testing and manufacturing demonstrate his commitment to innovation. His patents reflect a deep understanding of the challenges in the semiconductor industry and offer practical solutions to enhance efficiency.