David William Knebelsberger

This inventor holds 10 USPTO granted patents. Top assignees: Broadcom Corporation, Motorola Corporation. Active years: 2002-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: David William Knebelsberger. Retrieved from https://idiyas.com/inventor/david-william-knebelsberger

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 10

% Patents Active = 70.0

Average Co-Inventor Count = 4.3

ph-index = 5

Forward Citations = 131(Granted Patents)

Location History:

Chandler, AZ (US) (2002)
Tempe, AZ (US) (2003 - 2014)

Company Filing History:

Years Active: 2002-2014

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10 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8830721 - Encoded read-only memory (ROM) bitcell, array, and architecture (2014-09-09),

2. 8406031 - Read-only memory (ROM) bitcell, array, and architecture (2013-03-26),

3. 7986570 - Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme (2011-07-26),

4. 7639549 - Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme (2009-12-29),

5. 7251175 - Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme (2007-07-31),

6. 6903996 - Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme (2005-06-07),

7. 6822918 - Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme (2004-11-23),

8. 6639866 - Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme (2003-10-28),

9. 6519204 - Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme (2003-02-11),

10. 6405160 - Memory compiler interface and methodology (2002-06-11),

Title: **David William Knebelsberger: A Visionary Inventor in Memory Architectures**

Introduction

David William Knebelsberger, an acclaimed inventor residing in Tempe, AZ, has made impactful contributions to the field of memory technologies. With a portfolio of 10 patents to his name, Knebelsberger continues to innovate with his groundbreaking developments in read-only memory (ROM) architectures.

Latest Patents

Among his most recent innovations is the patented technology pertaining to "Encoded read-only memory (ROM) bitcell, array, and architecture." This invention includes improved memory bitcells, memory arrays, and innovative memory architectures. The memory cells consist of a transistor with drain, source, and gate terminals alongside a plurality of program nodes, each charged to a predetermined voltage and connected to respective bit lines. This advancement promises enhanced efficiency and performance in data storage solutions.

Career Highlights

David has had a notable career, including significant roles at renowned companies such as Broadcom Corporation and Motorola Corporation. His experience in these leading technology firms has undoubtedly shaped his inventive genius and allowed him to push the boundaries of memory architecture.

Collaborations

Throughout his journey, Knebelsberger has had the pleasure of collaborating with talented individuals such as Douglas D. Smith and Mark Slamowitz. Their collective expertise and innovative spirit foster a dynamic environment that has led to continual advancements in their field.

Conclusion

In conclusion, David William Knebelsberger stands as a testament to the impact of dedicated inventors in shaping the future of memory technologies. With a solid foundation in patented innovations and successful collaborations, he continues to influence the tech world, paving the way for advancements that enhance our everyday technological experiences.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]