Very small swing high performance asynchronous cmos static memory (multi-port register file) with power reducing column multiplexing scheme

Abstract

The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously, and a method of making the multi-port register file memory. The storage elements are arranged in N rows and M columns and store data, each column having at least one output channel or circuit. Two read port pairs are coupled to each of the storage elements and a plurality of differential sensing devices or circuits. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and at least one of the sensing device. The method of forming the multi-port register file memory comprises determining the number of storage elements and arranging the storage elements in the N rows and M columns, each column having an output channel. The number of read ports is determined based, at least in part, on the number of storage elements. The number of differential sensing devices is determined based, at least in part, on a number of the output channels. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.