David Spatafore

Title: David Spatafore: Innovator in Verification Technologies

Introduction

David Spatafore is a notable inventor based in Maple Grove, MN (US). He has made significant contributions to the field of formal verification analysis of circuit designs. With a total of 3 patents, his work focuses on improving the efficiency and effectiveness of verification processes.

Latest Patents

One of his latest patents is titled "Providing concise data for analyzing checker completeness." This invention presents methods and systems that concisely report information useful to users, such as circuit designers or verification engineers. The goal is to help these professionals efficiently determine the necessary manual actions to resolve gaps in verification coverage. The reported information includes lists of signals on which checkers can be written, which can be ranked and limited to a subset of interest signals. This innovation enhances the reporting provided to users, allowing them to advance the formal verification process more quickly toward full coverage of relevant circuit design portions.

Another significant patent is the "Method and system for verification using combined verification data." This method involves using a processor to obtain verification data and models from multiple verification engines that relate to different verification methods. The process includes merging these models into a combined verification model and calculating a combined verification metric grade for various verification entities. This invention aims to streamline the verification process by outputting a comprehensive verification metric grade.

Career Highlights

David Spatafore is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of verification technologies. His work has been instrumental in advancing the capabilities of verification tools and methodologies.

Collaborations

Throughout his career, David has collaborated with talented professionals, including Amit Verma and Yael Kinderman. These collaborations have contributed to the development of cutting-edge verification solutions.

Conclusion

David Spatafore is a prominent inventor whose work in verification technologies has significantly impacted the field. His innovative patents and contributions continue to enhance the efficiency of formal verification processes in circuit design.