Los Altos, CA, United States of America

David S Reed

This inventor holds 1 USPTO granted patent. Top assignee: Monterey Design Systems, Inc.. Active years: 2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: David S Reed. Retrieved from https://idiyas.com/inventor/david-s-reed-uezmmu8r

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 109(Granted Patents)


Company Filing History:


Years Active: 2003

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1 patent (USPTO):Explore Patents

Title: The Innovative Contributions of David S. Reed

Introduction

David S. Reed is a notable inventor based in Los Altos, California. He has made significant contributions to the field of integrated circuit design. His work focuses on enhancing the efficiency and effectiveness of digital integrated circuits.

Latest Patents

David S. Reed holds a patent for a "Method for designing large standard-cell base integrated circuits." This automated method utilizes a software program to partition the design into physically realizable blocks. It creates connections between these blocks to maximize operating speed and routability while minimizing the area of the resulting integrated circuit. Timing and physical constraints are generated for each block, allowing standard-cell place and route software to treat each block as a separate integrated circuit.

Career Highlights

Reed is associated with Monterey Design Systems, Inc., where he applies his expertise in integrated circuit design. His innovative approach has contributed to advancements in the field, making complex designs more manageable and efficient.

Collaborations

Throughout his career, David has collaborated with notable professionals, including Yaacov I. Greidinger and Ara Markosian. These collaborations have further enriched his work and contributed to the development of cutting-edge technologies.

Conclusion

David S. Reed's contributions to integrated circuit design exemplify the impact of innovation in technology. His patented methods continue to influence the efficiency of digital circuit design, showcasing the importance of creativity in engineering.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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