Totton, United Kingdom

David Paul Price

This inventor holds 2 USPTO granted patents and 1 EPO patent. Top assignee: Nxp B.v.. Active years: 2012-2026.


% Patents Active = 100.0


Average Co-Inventor Count = 3.1

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 2012-2026

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2 patents (USPTO):Explore Patents

Title: Innovations by David Paul Price

Introduction

David Paul Price is an accomplished inventor based in Totton, GB. He has made significant contributions to the field of integrated circuits, holding 2 patents that showcase his innovative approach to technology.

Latest Patents

One of his latest patents is the "Clock signal monitoring unit." This invention relates to a clock signal monitoring unit that comprises first, second, and third flip-flops, first and second XOR gates, and a delay element that are functionally interconnected in a specific manner. The proposed clock signal monitoring unit can detect both a rising edge glitch and a falling edge glitch. This design provides an area-saving device that does not require trimming efforts, ultimately saving space and time. Additionally, the clock signal monitoring unit is designed for low electric power consumption, utilizing as few as four clocked flip-flops implemented via Register Transfer Logic with an already tuned delay element. This makes it particularly useful for designs that rely on both edges of the clock for proper operation.

Another notable patent is the "IC testing methods and apparatus." This method is designed for testing an integrated circuit that comprises multiple cores, with at least two cores having different associated first and second clock signals of varying frequencies. A test signal is provided using a clocked scan chain clocked at a test frequency (TCK). A transition in a clock circuit reset signal triggers the operation of a clock divider circuit, which derives the first and second clock signals from an internal clock of the integrated circuit. These clock signals start at substantially the same time and are utilized during a test mode to perform testing of the integrated circuit. After testing, the results are output using the clocked scan chain clocked at the test frequency (TCK). The invention also includes clocking hardware that enables at-speed testing, allowing for on-the-fly switching between a slower tester-driven clock for shift modes and faster clocks generated by on-chip PLLs and divider circuits for the test mode.

Career Highlights

David Paul Price is currently employed at NXP B.V., where he continues to innovate and contribute to advancements in integrated circuit technology. His work has had a significant impact on the efficiency and effectiveness of IC testing and monitoring.

Collaborations

Throughout his career, David has collaborated with notable colleagues, including Ruediger Solbach and Norbert Schomann. These collaborations have further enhanced his contributions to the

Profile summary based on public USPTO records.
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