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For the Inventor, By the Inventor

Poughkeepsie, NY, United States of America

David D Cadigan

USPTO Granted Patents = 25 

Average Co-Inventor Count = 4.7

ph-index = 3

Forward Citations = 68(Granted Patents)


Location History:

  • Brewster, NY (US) (2014)
  • Poughkeepsie, NY (US) (2015 - 2020)
  • Fairfield, NY (US) (2021)
  • Danbury, CT (US) (2018 - 2023)

Company Filing History:

goldMedal25 out of 164,108 
 
International Business Machines Corporation
 patents

Years Active: 2014-2023

where 'Filed Patents' based on already Granted Patents

25 patents (USPTO):
1. 11609817 - Low latency availability in degraded redundant array of independent memory (2023-03-21),
2. 11520659 - Refresh-hiding memory system staggered refresh (2022-12-06),
3. 11200119 - Low latency availability in degraded redundant array of independent memory (2021-12-14),
4. 11119676 - Using spare bits in memory systems (2021-09-14),
5. 10949295 - Implementing dynamic SEU detection and correction method and circuit (2021-03-16),
6. 10897239 - Granular variable impedance tuning (2021-01-19),
7. 10896081 - Implementing SEU detection method and circuit (2021-01-19),
8. 10684968 - Conditional memory spreading for heterogeneous memory sizes (2020-06-16),
9. 10606696 - Internally-generated data storage in spare memory locations (2020-03-31),
10. 10585672 - Memory device command-address-control calibration (2020-03-10),
11. 10324879 - Mitigation of side effects of simultaneous switching of input/output (I/O data signals (2019-06-18),
12. 10229738 - SRAM bitline equalization using phase change material (2019-03-12),
13. 10157672 - SRAM bitline equalization using phase change material (2018-12-18),
14. 10134455 - Efficient calibration of a data eye for memory devices (2018-11-20),
15. 9965346 - Handling repaired memory array elements in a memory of a computer system (2018-05-08),

Title: **David D Cadigan: Innovator in Memory Systems**

Introduction

David D Cadigan, based in Poughkeepsie, NY, is a notable inventor recognized for his contributions to memory system innovations. With an impressive portfolio of 25 patents, he continuously pioneers advancements that enhance computing efficiency and reliability.

Latest Patents

Among his latest innovations are two significant patents. The first, titled "Low latency availability in degraded redundant array of independent memory," describes a computer-implemented method wherein a controller fetches data from various memory channels. This method is innovative as it detects and marks any unavailable memory channels, allowing for reconstructing fetch data from the remaining functional channels.

The second patent, "Refresh-hiding memory system staggered refresh," outlines a method for simultaneously refreshing multiple memory channels. This process ensures that each channel refreshes distinct ranks while also handling channels marked as unavailable, which further optimizes performance during data fetching.

Career Highlights

David Cadigan plays an influential role at the International Business Machines Corporation (IBM), where he engages in high-level research and development of memory systems. His contributions have greatly impacted the performance and reliability of modern computing technologies.

Collaborations

Throughout his career, David has collaborated with esteemed colleagues, including Adam J McPadden and Anuwat Saetow. These partnerships have fostered a creative environment that pushes the boundaries of innovation in technology.

Conclusion

David D Cadigan's inventive spirit and dedication to enhancing memory systems significantly contribute to the field of computing. His patents showcase his expertise and the importance of innovation within the technology sector, ensuring continued advancements that support the growing demands of modern applications.

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