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For the Inventor, By the Inventor

Beaverton, OR, United States of America

David B Papworth

USPTO Granted Patents = 52

 

Average Co-Inventor Count = 5.8

ph-index = 28

Forward Citations = 1,898(Granted Patents)

Forward Citations (Not Self Cited) = 1,882(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Beavertown, OR (US) (1999)
  • Beaverton, OR (US) (1995 - 2002)
  • Cornelius, OR (US) (2016 - 2022)

Company Filing History:

goldMedal51 out of 54,750 
 
Intel Corporation
 patents
silverMedal1 out of 832,843 
Other
 patents

Years Active: 1995-2024

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Areas of Expertise:
Processor Architecture
Binary Translation
Cache Line Zeroing
Pipeline Streamlining
Address Mapping
Throughput Scheduling
Branch Target Buffer
Instruction Fetch Pipeline
Dynamic Buffer Allocation
Out-of-Order Processing
Error Correction
Circular Buffer Allocation
52 patents (USPTO):Explore Patents
1. 12130740 - Apparatuses and methods for a processor architecture (2024-10-29),
2. 11294809 - Apparatuses and methods for a processor architecture (2022-04-05),
3. 10469557 - QoS based binary translation and application streaming (2019-11-05),
4. 10282296 - Zeroing a cache line (2019-05-07),
5. 9525586 - QoS based binary translation and application streaming (2016-12-20),
6. 6393550 - Method and apparatus for pipeline streamlining where resources are immediate or certainly retired (2002-05-21),
7. 6349380 - Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor (2002-02-19),
8. 6101597 - Method and apparatus for maximum throughput scheduling of dependent (2000-08-08),
9. 6079014 - Processor that redirects an instruction fetch pipeline immediately upon (2000-06-20),
10. 5987600 - Exception handling in a processor that performs speculative out-of-order (1999-11-16),
11. 5974523 - Mechanism for efficiently overlapping multiple operand types in a (1999-10-26),
12. 5944817 - Method and apparatus for implementing a set-associative branch target (1999-08-31),
13. 5918046 - Method and apparatus for a branch instruction pointer table (1999-06-29),
14. 5913050 - Method and apparatus for providing address-size backward compatibility (1999-06-15),
15. 5903751 - Method and apparatus for implementing a branch target buffer in CISC (1999-05-11),

Title: The Innovative Journey of David B Papworth

Introduction: David B Papworth, a talented inventor based in Beaverton, Oregon, has made significant contributions to the field of technology with his creative and groundbreaking ideas.

Latest Patents: David B Papworth holds several patents in various technological domains, showcasing his versatility and ingenuity in inventing new solutions to complex problems.

Career Highlights: Throughout his illustrious career, David B Papworth has been recognized for his exceptional problem-solving skills and his ability to translate innovative ideas into practical applications. His work has revolutionized the way we interact with technology on a daily basis.

Collaborations: David B Papworth has collaborated with leading tech companies and research institutions to further develop his inventions and bring them to the market. His collaborative spirit and dedication to excellence have earned him respect in the industry.

Conclusion: David B Papworth's passion for innovation and his relentless pursuit of excellence have established him as a prominent figure in the world of technology. His contributions have not only shaped the present but also hold the promise of shaping the future of technological advancements.

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