Kanagawa, Japan

Daiki Ito


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Location History:

  • Kanagawa, JP (2017 - 2021)
  • Taichung, TW (2022)

Company Filing History:


Years Active: 2017-2022

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4 patents (USPTO):

Title: Daiki Ito: Innovator in Semiconductor Technology

Introduction

Daiki Ito is a prominent inventor based in Kanagawa, Japan, known for his contributions to semiconductor technology. With a total of 4 patents to his name, he has made significant advancements in the field of memory cell design and testing.

Latest Patents

One of his latest patents is focused on an SRAM layout scheme for improving write margin. This semiconductor device allows for the application of different voltages to the sources and bases of pull-up transistors, enhancing the write margin of memory cells. The design includes P-well regions and an N-well region, where pull-down and accessing transistors are formed. Additionally, the first and second metal wires are strategically placed to ensure electrical connections within the SRAM. Another notable patent involves a test device and method for semiconductor storage devices. This device measures the characteristics of transistors in a memory cell, utilizing a resistor connected to a bit line to create a source follower circuit for testing.

Career Highlights

Throughout his career, Daiki Ito has worked with notable companies such as Sony Corporation and Winbond Electronics Corporation. His experience in these organizations has contributed to his expertise in semiconductor technology and innovation.

Collaborations

Daiki has collaborated with several professionals in the field, including Tsunayuki Ohwa and Satoru Inoue. These collaborations have further enriched his work and led to advancements in semiconductor design and testing.

Conclusion

Daiki Ito's innovative work in semiconductor technology, particularly in SRAM design and testing methods, showcases his significant contributions to the field. His patents reflect a commitment to enhancing memory cell performance and reliability.

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