Incheon-si, South Korea

Daehyeok Ha

This inventor holds 1 USPTO granted patent. Top assignee: Stats Chippac Pte. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Daehyeok Ha. Retrieved from https://idiyas.com/inventor/daehyeok-ha-oy7fyjgg

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Daehyeok Ha and Semiconductor Packaging Innovation.

Introduction

Daehyeok Ha is an inventor associated with Incheon-si, South Korea, and Stats Chippac Pte. Ltd. His listed patent concerns semiconductor packaging and shielding structures.

Latest Patents

The provided information lists one patent for Ha: “Semiconductor Device and Method of Forming Conductive Vias to Have Enhanced Contact to Shielding Layer.” The invention describes a substrate with conductive vias arranged in an offset pattern around a die attach area. Conductive layers are formed on both sides of the substrate, and an encapsulant covers the substrate and electrical component. After singulation through the vias, the exposed surface area of one via is greater than that of another. A shielding layer covers the electrical component and contacts the side surfaces of the vias, and may extend over the opposite surface of the substrate. The design focuses on improving contact between the conductive vias and the shielding layer. Ha’s listed patent count is 1 patent.

Career Highlights

The available information identifies Ha as an inventor working with Stats Chippac Pte. Ltd. His listed patent reflects work in semiconductor devices, conductive vias, and shielding-layer integration.

Collaborations

Sungsoo Kim is identified as Ha’s coworker. The provided details do not specify whether Kim is a co-inventor on the listed patent.

Conclusion

Daehyeok Ha’s listed patent addresses a semiconductor packaging approach designed to enhance contact between conductive vias and a shielding layer.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…