San Ramon, CA, United States of America

Dae Hyun Kim

This inventor holds 1 USPTO granted patent. Top assignee: Windbond Electronics Corp.. Active years: 2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dae Hyun Kim. Retrieved from https://idiyas.com/inventor/dae-hyun-kim-5ph30zua

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 14(Granted Patents)


Company Filing History:


Years Active: 2016

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1 patent (USPTO):Explore Patents

Title: Dae Hyun Kim and NAND Flash Memory Innovation.

Introduction

Dae Hyun Kim is an inventor associated with San Ramon, California, and Windbond Electronics Corp. His work includes a patent for a NAND flash memory architecture designed to reduce read latency and prevent unintended programming.

Latest Patents

The provided patent information identifies one patent for Kim: “NAND Flash Memory Array Architecture Having Low Read Latency and Low Program Disturb.” The invention combines a small NAND string, a dual-plane interleaved memory architecture, a partitioned NAND array, selectively coupled local bit lines, and a counter-biasing mechanism. These features aim to improve random-access and initial-page-read speeds while avoiding inadvertent programming and program disturb. The design seeks to bring those speeds closer to NOR flash memory while retaining NAND flash’s higher memory density and lower power operation. Kim is credited with 1 patent in the information provided.

Career Highlights

Kim’s listed work at Windbond Electronics Corp. connects his career to memory technology and flash-memory design. The patent highlights an approach to balancing faster access with the density and power advantages associated with NAND flash.

Collaborations

The provided information lists Anil Gupta and Jong Oh Lee as Kim’s coworkers. It does not specify whether they collaborated with him on this patent.

Conclusion

Dae Hyun Kim’s identified patent addresses key NAND flash design challenges by targeting lower read latency and reduced program disturb while preserving the technology’s density and power advantages.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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