Ulsan, South Korea

Dae-Hoon Kim

This inventor holds 1 USPTO granted patent. Top assignee: Lg Siltron Incorporated. Active years: 2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dae-Hoon Kim. Retrieved from https://idiyas.com/inventor/dae-hoon-kim-ki8aol32

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2017

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1 patent (USPTO):Explore Patents

Title: Innovations by Dae-Hoon Kim in Wafer Grinding Technology

Introduction

Dae-Hoon Kim is a notable inventor based in Ulsan, South Korea. He has made significant contributions to the field of wafer grinding technology. His innovative approach has led to the development of a unique device that enhances the efficiency of wafer processing.

Latest Patents

Dae-Hoon Kim holds a patent for a "Plate and dual side wafer grinding device including same." This invention provides a surface plate designed for a wafer double-side grinding device. The surface plate features a plurality of first surface plate grooves formed in one direction, along with a plurality of second surface plate grooves formed in a different direction. The arrangement of these grooves includes first and second surface plate groove portions, which have steps formed toward the center or outer periphery of the lower surface plate. This design aims to improve the grinding process of wafers, making it more effective and precise.

Career Highlights

Dae-Hoon Kim is associated with LG Siltron Incorporated, a company known for its advancements in semiconductor materials and technologies. His work at LG Siltron has allowed him to focus on innovations that drive the industry forward. With a patent count of 1 patent, he continues to contribute to the field with his expertise and creativity.

Conclusion

Dae-Hoon Kim's contributions to wafer grinding technology exemplify the impact of innovative thinking in the semiconductor industry. His patented device showcases the potential for improved efficiency in wafer processing, highlighting the importance of continuous innovation in this field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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