Los Gatos, CA, United States of America

Dableena Das


Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2016

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1 patent (USPTO):Explore Patents

Title: Dableena Das: Innovator in Memory Reliability

Introduction

Dableena Das is a prominent inventor based in Los Gatos, CA (US). She has made significant contributions to the field of memory systems, particularly in enhancing reliability, availability, and serviceability. Her innovative work has led to the development of a patented mechanism that addresses critical challenges in memory technology.

Latest Patents

Dableena Das holds a patent for a "Mechanism for achieving high memory reliability, availability and serviceability." This invention describes a method for detecting permanent failures in memory devices within a computing system. The mechanism involves merging error-correction code (ECC) locator devices from different channels to eliminate failures effectively. This advancement is crucial for improving the overall performance and reliability of memory systems.

Career Highlights

Dableena is currently employed at Intel Corporation, where she continues to push the boundaries of technology. Her work at Intel has positioned her as a key player in the development of innovative memory solutions. With her expertise, she contributes to projects that enhance the efficiency and reliability of computing systems.

Collaborations

Dableena has collaborated with notable colleagues, including Kai Cheng and Jonathan C Jasper. These partnerships have fostered a creative environment that encourages the exchange of ideas and the development of groundbreaking technologies.

Conclusion

Dableena Das is a trailblazer in the field of memory reliability, with her patented innovations paving the way for advancements in computing technology. Her contributions at Intel Corporation and collaborations with esteemed colleagues highlight her impact on the industry.

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