This inventor holds 1 USPTO granted patent. Top assignee: Stmicroelectronics Gmbh. Active years: 2002.
Company Filing History:
Years Active: 2002
Title: D Shimizu: Innovator in Computer Systems
Introduction
D Shimizu is a notable inventor based in Palo Alto, CA (US). He has made significant contributions to the field of computer systems, particularly in memory management and cache coherency protocols. His innovative work has led to the development of a patented technology that enhances the efficiency of memory systems in computing.
Latest Patents
D Shimizu holds a patent for a "Coherency protocol," which describes a computer system featuring a memory system where some memory is designated as shared memory. This invention includes a transaction-based bus mechanism that connects to the memory system and incorporates a cache coherency transaction defined within its transaction set. The processor, equipped with cache memory, is linked to the memory system through this transaction-based bus mechanism. The system component connected to the bus mechanism contains logic for specifying cache coherency policy. This logic initiates a cache transaction based on the specified cache policy, while the processor responds by executing the cache operation defined by the cache transaction. He has 1 patent to his name.
Career Highlights
D Shimizu is currently employed at STMicroelectronics GmbH, where he continues to work on innovative technologies in the field of computer systems. His expertise in memory systems and cache coherency has positioned him as a valuable asset in his organization.
Collaborations
D Shimizu collaborates with Andrew Hedley Jones, contributing to advancements in their field through shared knowledge and expertise.
Conclusion
D Shimizu's contributions to computer systems, particularly through his patented coherency protocol, demonstrate his innovative spirit and commitment to enhancing technology. His work continues to influence the development of efficient memory systems in computing.