San Jose, CA, United States of America

Chunling Hu

This inventor holds 2 USPTO granted patents. Top assignee: Intel Corporation. Active years: 2010-2018.


% Patents Active = 50.0

Average Co-Inventor Count = 2.7

ph-index = 1

Forward Citations = 233(Granted Patents)


Location History:

  • Piscataway, NJ (US) (2010)
  • San Jose, CA (US) (2018)

Company Filing History:


Years Active: 2010-2018

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2 patents (USPTO):Explore Patents

Title: Innovations of Chunling Hu

Introduction

Chunling Hu is an accomplished inventor based in San Jose, CA. He has made significant contributions to the field of technology, particularly in dynamic task management and processor optimization. With a total of 2 patents, his work reflects a commitment to enhancing system efficiency and performance.

Latest Patents

Chunling Hu's latest patents include a dynamic runtime task management system. This innovative system features task manager circuitry that detects correspondences between output arguments from first tasks and input arguments to second tasks. By intelligently apportioning tasks into subtasks, the system optimizes processing efficiency. His second patent focuses on a method and apparatus for dynamic voltage and frequency scaling. This invention employs machine learning techniques to predict processor utilization, allowing for the dynamic adjustment of voltage and clock frequency to reduce power consumption.

Career Highlights

Chunling Hu is currently employed at Intel Corporation, where he continues to push the boundaries of technology. His work at Intel has positioned him as a key player in the development of advanced computing solutions.

Collaborations

Chunling has collaborated with talented coworkers, including Tatiana Shpeisman and Jack Liu. Their combined expertise fosters an environment of innovation and creativity.

Conclusion

Chunling Hu's contributions to technology through his patents and work at Intel Corporation highlight his role as a leading inventor in the field. His innovative approaches to task management and processor optimization are paving the way for future advancements.

Profile summary based on public USPTO records.
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