Kaohsiung, Taiwan

Chung-Min Liu

This inventor holds 4 USPTO granted patents. Top assignees: Industrial Technology Research Institute, Other. Active years: 1999-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chung-Min Liu. Retrieved from https://idiyas.com/inventor/chung-min-liu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.7

ph-index = 3

Forward Citations = 118(Granted Patents)


Location History:

  • Hsinchu, TW (1999)
  • Kaohsiung, TW (2001 - 2003)

Company Filing History:


Years Active: 1999-2003

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4 patents (USPTO):Explore Patents

Title: Innovations of Chung-Min Liu

Introduction

Chung-Min Liu is a notable inventor based in Kaohsiung, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. His work focuses on improving the efficiency and performance of various semiconductor devices.

Latest Patents

One of his latest patents is titled "Structure and manufacturing method of SiC dual metal trench Schottky diode." This invention involves a structure and manufacturing method for an SiC dual metal trench diode. P-type impurity is doped into the bottom of the trench layer to eliminate leakage current or avalanche breakdown, thereby increasing the concentration of the epitaxial layer. Additionally, N-type impurity can be doped into the region between the Schottky contact metal and the epitaxial layer to adjust the Schottky barrier, reducing the forward voltage required for current flow.

Another significant patent is "Trench MOS device and termination structure." This patent discloses a termination structure for power trench MOS devices, which can be Schottky diodes, IGBTs, or DMOS, depending on the semiconductor substrate prepared. The termination structure includes a semiconductor substrate with a trench, a spacer-like MOS gate on the trench's sidewall, and a termination structure oxide layer covering part of the MOS gate and the trench's bottom. The trench is formed from the boundary of the active region to the edge of the semiconductor substrate, allowing for the formation of trench MOS devices in the active region.

Career Highlights

Chung-Min Liu has worked at the Industrial Technology Research Institute, where he has contributed to various innovative projects. His expertise in semiconductor technology has positioned him as a key figure in the development of advanced electronic components.

Collaborations

He has collaborated with notable colleagues, including Chih-Wei Hsu and Ming-Jinn Tsai, further enhancing the impact of his work in the field.

Conclusion

Chung-Min Liu's contributions to semiconductor technology through his patents and collaborations highlight his role as an influential inventor. His innovative approaches continue to shape the future of electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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