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Hsinchu, Taiwan

Chuan Liu

This inventor holds 21 USPTO granted patents, primarily in Memory Device Management. Top assignee: Mediatek Corporation. Active years: 2007-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chuan Liu. Retrieved from https://idiyas.com/inventor/chuan-liu-8w55dcli

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 21

% Patents Active = 90.5

Average Co-Inventor Count = 2.7

ph-index = 3

Forward Citations = 31(Granted Patents)

Location History:

Tai Nan County, TW (2008 - 2011)
Jen Te Hsiang, TW (2008 - 2012)
Hsin-Chu, TW (2007 - 2018)

Company Filing History:

21 out of 5,102

Mediatek Corporation

Years Active: 2007-2018

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Areas of Expertise:

Multi-Channel Memory

Channel Switch Response

Clock Generation

Noise Interference

SATA Interface

Signal Detection

Data Accessing Device

SATA Transmission Errors

Peripheral Device

Primitive Prediction

21 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10037275 - Method for managing multi-channel memory device to have improved channel switch response time and related memory control system (2018-07-31),

2. 9965384 - Method for managing multi-channel memory device to have improved channel switch response time and related memory control system (2018-05-08),

3. 9182920 - Channel activating method and peripheral device performing the same (2015-11-10),

4. 8619938 - Clock generation devices and methods (2013-12-31),

5. 8451971 - Communication systems, clock generation circuits thereof, and method for generating clock signal (2013-05-28),

6. 8281189 - SATA primitive prediction and correction (2012-10-02),

7. 8214716 - Method for processing noise interference in data accessing device with serial advanced technology attachment interface (2012-07-03),

8. 8086938 - Method for processing noise interference (2011-12-27),

9. 8010868 - Method for processing noise interference (2011-08-30),

10. 7865803 - Method for processing noise interference in data accessing device with serial advanced technology attachment (SATA) interface (2011-01-04),

11. 7796719 - Signal detection apparatus and method thereof (2010-09-14),

12. 7752363 - Signal generating circuit and related method for activating physical channel between host and peripheral device (2010-07-06),

13. 7665011 - Method and circuit for reducing SATA transmission data errors by adjusting the period of sending align primitives (2010-02-16),

14. 7634692 - SATA primitive prediction and correction (2009-12-15),

15. 7624332 - Method for processing noise interference in data accessing device with serial advanced technology attachment interface (2009-11-24),

Title: The Innovative Journey of Chuan Liu

Introduction: Chuan Liu, a pioneering inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking inventions and patents.

Latest Patents: Chuan Liu holds several patents in the areas of semiconductor technology and renewable energy solutions, showcasing his commitment to driving innovation in these sectors.

Career Highlights: With a background in engineering and a passion for pushing the boundaries of what is possible, Chuan Liu has worked for leading tech companies in Taiwan, where he has spearheaded projects that have led to the development of cutting-edge technologies.

Collaborations: Throughout his career, Chuan Liu has collaborated with top researchers and engineers in the industry, fostering a culture of innovation and knowledge-sharing that has been instrumental in his success as an inventor.

Conclusion: Chuan Liu's relentless pursuit of innovation and his dedication to creating solutions that have a positive impact on society make him a standout figure in the world of inventors. His work continues to inspire future generations of innovators to push the boundaries of what is possible in the realm of technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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