Santa Clara, CA, United States of America

Christopher Celio

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Intel Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Christopher Celio. Retrieved from https://idiyas.com/inventor/christopher-celio

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 8.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Christopher Celio: An Inventor in Instruction-Fetch Technology.

Introduction

Christopher Celio is an inventor based in Santa Clara, California, and is associated with Intel Corporation. His work includes a patent addressing how processors handle instruction-fetch hazards.

Latest Patents

Celio is credited with 1 patent: “Stalling an Instruction Fetch Operation Impacted by a Hazard Without Stalling Another Instruction Fetch Operation Not Impacted by the Hazard.” The invention describes multiple sets of fetch circuitry, each with the same pipeline stages, that fetch instruction blocks from storage. When a hazard affects a stage in one set, stall circuitry holds the affected fetch operation and any relevant earlier operations in that set until the hazard is cleared. Meanwhile, another set can advance an unaffected fetch operation during the same cycle. This approach allows instruction fetching to continue where possible rather than stalling all fetch activity.

Career Highlights

Celio’s listed patent is associated with Intel Corporation and focuses on managing pipeline hazards in instruction-fetch operations. The patent describes a design intended to preserve progress in unaffected fetch circuitry while a hazard is being resolved elsewhere.

Collaborations

Celio’s listed coworkers include Ariel Sabba and Eliyah Kilada. The patent’s technical subject reflects work in processor architecture and instruction-fetch pipeline design.

Conclusion

Christopher Celio’s patent describes a way to handle instruction-fetch hazards selectively, allowing unaffected fetch operations to proceed while the impacted operation waits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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