This inventor holds 1 USPTO granted patent. Top assignee: Texas Instruments Corporation. Active years: 2001.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2001
Title: Christopher Bowles and Semiconductor Silicide Processing.
Introduction
Christopher Bowles is an inventor associated with Plano, Texas, and Texas Instruments Corporation. His patent work addresses a semiconductor manufacturing technique intended to reduce resistance in a transistor’s silicided gate structure.
Latest Patents
The provided information identifies one patent for Christopher Bowles: “Method of Forming a Silicide Layer Using an Angled Pre-Amorphization Implant.” The method describes forming a semiconductive structure over a semiconductor substrate, then amorphizing part of that structure by introducing an amorphizing substance at an angle greater than seven degrees from the substrate’s normal axis. A metal layer is subsequently formed on the structure and interacts with the amorphized portion to create a lower-resistivity silicide.
The patent describes possible semiconductive materials including doped or undoped polysilicon and epitaxial silicon. It also lists titanium, cobalt, tungsten, molybdenum, nickel, platinum, and palladium as possible metals. The stated objective is to improve the electrical properties of the transistor’s gate structure.
Career Highlights
Bowles’s identified patent reflects work in semiconductor fabrication, particularly the formation of silicide layers in transistor structures. The supplied information associates him with Texas Instruments Corporation and lists 1 patent.
Collaborations
Jorge A. Kittl is identified as Bowles’s coworker. The available information does not specify their roles in the patent or describe the nature of their collaboration.
Conclusion
Christopher Bowles’s listed patent focuses on using angled pre-amorphization to form a lower-resistivity silicide layer, highlighting a targeted approach to improving transistor fabrication.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
