Hsinchu, Taiwan

Ching-Wei Hung

This inventor holds 2 USPTO granted patents and 1 published patent application. Top assignee: Powertech Technology Inc.. Active years: 2011-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ching-Wei Hung. Retrieved from https://idiyas.com/inventor/ching-wei-hung

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 2 

Average Co-Inventor Count = 1.6

ph-index = 1

Forward Citations = 10(Granted Patents)


Company Filing History:


Years Active: 2011-2012

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2 patents (USPTO):Explore Patents

Title: Innovations of Ching-Wei Hung

Introduction

Ching-Wei Hung is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor packaging, holding a total of 2 patents. His work focuses on enhancing the efficiency and reliability of semiconductor devices.

Latest Patents

Ching-Wei Hung's latest patents include innovative designs that improve semiconductor packaging. One of his patents is titled "Substrate and package with micro BGA configuration." This invention reveals a substrate of a micro-BGA package that primarily comprises a substrate core, a first trace, and a second trace. The substrate core features a slot formed between a first board part and a second board part. The first trace is disposed on the first board part and has a suspended inner lead that extends into the slot, where the inner lead has an assumed broken point. The second trace is integrally connected to the inner lead at this assumed broken point. Notably, a non-circular through hole is formed at the assumed broken point, featuring two symmetric V-notches that face opposing external sides of the inner lead. This design ensures that the inner lead does not unexpectedly break and can be accurately broken during thermal compression processes.

Another significant patent is "Semiconductor package having substrate ID code and its fabricating method." This invention describes a semiconductor package that includes a substrate ID code and its manufacturing method. A circuit and a solder mask are formed on the bottom surface of the substrate, with the solder mask covering most of the circuit and a circuit-free zone. A chip is placed on the top surface of the substrate, while a substrate ID code consisting of multiple laser marks is inscribed in the solder mask or in a portion of an encapsulant on the bottom surface. This innovation facilitates quality control and failure tracking by allowing easy identification of the substrate lot number without altering the appearance of the semiconductor package.

Career Highlights

Ching-Wei Hung is currently employed at Powertech Technology Inc., where he continues to develop cutting-edge semiconductor technologies. His work has significantly impacted the efficiency and reliability of semiconductor packaging processes.

Collaborations

Ching-Wei Hung collaborates with talented individuals in his field, including coworkers Chin-Ti Chen and Bing-Shun Yu. Their combined expertise contributes to the advancement of semiconductor technology.

Conclusion

Ching-Wei Hung's

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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