Hsinchu, Taiwan

Ching-hua Lee

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ching-hua Lee. Retrieved from https://idiyas.com/inventor/ching-hua-lee-77r9cpp1

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Ching-hua Lee and Semiconductor Passivation Layers

Introduction

Ching-hua Lee is an inventor associated with Hsinchu, Taiwan, and Taiwan Semiconductor Manufacturing Co., Ltd. The available information identifies 1 patent associated with Lee.

Latest Patents

Lee’s patent, “Passivation Layers for Semiconductor Devices,” describes a semiconductor device with passivation layers on active regions of field-effect transistor devices, along with a method for fabricating the device. The structure includes a substrate, source/drain regions, nanostructured channel regions, and a nanosheet structure wrapped around the channels. The source/drain regions contain alternating semiconductor layers and an epitaxial region. One portion of the passivation layer lies between the epitaxial region and the semiconductor-layer stack, while another covers the channel-region sidewalls. These features address passivation in semiconductor devices with nanosheet channels.

Career Highlights

The provided information connects Lee’s patent work with Taiwan Semiconductor Manufacturing Co., Ltd., a semiconductor company based in Taiwan. The patent focuses on device structure and fabrication.

Collaborations

Cheng-Yi Peng and Song-Bor Lee are identified as Lee’s coworkers. The available details do not specify their roles in the patent or whether they collaborated on it.

Conclusion

Ching-hua Lee’s identified patent concerns passivation layers for semiconductor devices with nanostructured channels and nanosheet structures, reflecting work associated with Taiwan Semiconductor Manufacturing Co., Ltd.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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