This inventor holds 1 USPTO granted patent. Top assignee: Panasonic Corporation. Active years: 2010.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2010
Title: Chinatsu Seto: Semiconductor Circuit Inventor
Introduction
Chinatsu Seto is an inventor associated with Toyama, Japan, and Panasonic Corporation. Her patent work concerns integrated-circuit design and semiconductor manufacturing.
Latest Patents
The provided information lists one patent for Seto: “Integrated Circuit and Method of Manufacturing the Same.” The invention describes an integrated circuit with a semiconductor substrate containing a well region, an enhancement-type MOS transistor, and multiple depletion-type MOS transistors. At least one depletion-type transistor has an implanted channel region in which an impurity is used to adjust its threshold voltage. The patent specifies that the concentration of the implanted impurity exceeds the concentration of the other conductivity-type impurity in that region.
Career Highlights
Seto’s listed patent reflects work on controlling transistor threshold voltage through channel implantation, a technique relevant to integrated-circuit design and fabrication. She is associated with Panasonic Corporation, and the supplied information credits her with 1 patent.
Collaborations
The provided information names Emi Kanazaki and Mikiya Uchida as Seto’s coworkers. It does not specify their roles in the patent or describe particular collaborations.
Conclusion
Chinatsu Seto’s recorded invention focuses on impurity implantation for threshold-voltage adjustment in MOS transistors, highlighting her contribution to semiconductor technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile