This inventor holds 1 USPTO granted patent. Top assignee: Mosel Vitelic Corporation. Active years: 2000.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2000
Title: Innovations of Chin-Ta Wu
Introduction
Chin-Ta Wu is a notable inventor based in ChangHua, Taiwan. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a unique patent that addresses dielectric planarization processes.
Latest Patents
Chin-Ta Wu holds a patent titled "Process for intermetal SOG/SOP dielectric planarization." This patent describes a method for achieving dielectric planarization without adverse effects. The process begins with the formation of a silicon-rich oxide (SRO) layer on a substrate surface. Subsequently, a metal layer and an antireflective coating (ARC) layer are deposited over the SRO layer. These layers are then etched to define metal patterns using conventional lithography and etching techniques. Following this, an Ozone-TEOS (O₃-TEOS) layer and a SOG layer are formed over the entire substrate surface. The O₃-TEOS layer and SOG layer undergo etching back treatment to achieve a planar substrate surface, with only a small portion of the O₃-TEOS layer remaining on the substrate. The etching back treatment can utilize PEB, TEB, or CMP techniques. Finally, a passivation layer is deposited over the remaining O₃-TEOS layer.
Career Highlights
Chin-Ta Wu is associated with Mosel Vitelic Corporation, where he has contributed to various innovative projects. His expertise in semiconductor processes has been instrumental in advancing the company's technological capabilities.
Collaborations
Chin-Ta Wu has worked alongside talented colleagues, including Tuby Tu and Chen Kuang-Chao. Their collaborative efforts have fostered an environment of innovation and creativity within their projects.
Conclusion
Chin-Ta Wu's contributions to the field of semiconductor technology through his patent demonstrate his commitment to innovation. His work continues to influence advancements in dielectric planarization processes.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile