Chin-Jung Su

Title: Chin-Jung Su: Innovator in Memory Testing Technology

Introduction

Chin-Jung Su is a notable inventor based in Taipei, Taiwan. He has made significant contributions to the field of memory testing technology, particularly through his innovative patent.

Latest Patents

Chin-Jung Su holds a patent for a built-in memory current test circuit. This invention is designed to test a memory on a chip and includes a built-in self-test circuit and a dynamic current generation module. The built-in self-test circuit is integrated on the chip to receive and process a test signal, generating a control signal to manage the memory's operation and a current control code. The dynamic current generation module, also located on the chip, produces a test current into the memory based on the current control code. This design reduces the current switch time in the built-in memory current test circuit, allowing for an integrated test that combines both functional and stress tests.

Career Highlights

Chin-Jung Su is affiliated with the Industrial Technology Research Institute, where he continues to advance his research and development efforts in memory technology. His work has been instrumental in enhancing the efficiency and effectiveness of memory testing processes.

Collaborations

Chin-Jung Su has collaborated with notable colleagues, including Yeong-Jar Chang and Kun-Lun Luo, contributing to various projects and innovations in the field.

Conclusion

Chin-Jung Su's contributions to memory testing technology through his innovative patent demonstrate his expertise and commitment to advancing the field. His work continues to influence the development of efficient memory testing solutions.