This inventor holds 2 USPTO granted patents and 1 published patent application. Top assignee: Advanced Semiconductor Engineering, Inc.. Active years: 2006-2007.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Location History:
- Kaohsiung, TW (2006)
- Kaoshiung, TW (2007)
Company Filing History:
Years Active: 2006-2007
Title: Chin-Hsien Lin: Innovator in Semiconductor Packaging
Introduction
Chin-Hsien Lin is a prominent inventor based in Kaohsiung, Taiwan. He has made significant contributions to the field of semiconductor packaging, holding a total of 2 patents. His innovative designs and methods have advanced the technology used in multi-chip stack packages.
Latest Patents
One of his latest patents is for a Multi-chip stack package. This invention primarily includes a substrate, a first chip, a redistribution structure, and at least one second chip. The first chip is positioned on the substrate with its active surface facing upwards. The redistribution structure consists of multiple first intermediate pads, second intermediate pads, and external pads. These pads are formed on the active surface of the first chip, allowing for electrical connections between the first and second intermediate pads. The second chip is placed on the redistribution structure and is electrically connected to the first intermediate pads. Additionally, the second intermediate pads connect to the substrate through bonding wires, reducing the connection length and enhancing efficiency.
Another notable patent is a Method for manufacturing a package. This method involves several steps, including providing a substrate with an opening, placing a metal slice on the substrate's bottom surface to cover the opening, and bonding pads on the bottom surface. A die is then positioned on the metal slice, either inside the opening or above the substrate's top surface. Bond wires are formed to connect the die to the substrate, followed by encapsulating the die and bond wires with a mold compound. The process concludes with the formation of solder balls on exposed bond pads, ensuring effective electrical connections.
Career Highlights
Chin-Hsien Lin is currently employed at Advanced Semiconductor Engineering, Inc., where he continues to innovate in semiconductor technology. His work has been instrumental in developing advanced packaging solutions that meet the demands of modern electronics.
Collaborations
He collaborates with talented coworkers, including Jung-Kun Kang and Yu-Fang Tsai, who contribute to the innovative environment at Advanced Semiconductor Engineering, Inc.
Conclusion
Chin-Hsien Lin's contributions to semiconductor packaging through his patents and collaborative efforts highlight his role as a key innovator in the industry. His work continues to influence the future of semiconductor technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile