Hangzhou, China

Chihsen Huang

This inventor holds 1 USPTO granted patent. Top assignee: Semiconductor Technology (Hangzhou) Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chihsen Huang. Retrieved from https://idiyas.com/inventor/chihsen-huang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Chihsen Huang and Semiconductor Device Manufacturing

Introduction

Chihsen Huang is an inventor associated with Hangzhou, China, and Semiconductor Technology (Hangzhou) Ltd. His listed patent work concerns semiconductor device structures and their manufacturing methods.

Latest Patents

Huang is credited with 1 patent: “Semiconductor Device Structure and Manufacturing Method Thereof.” The disclosed method describes forming separate gate dielectric layers on two regions of a semiconductor substrate, then creating a conductive layer and a patterned barrier layer. The barrier pattern serves as a mask while the conductive layer is etched to form two gates. A photolithography pattern then exposes a well implantation area and part of the barrier pattern, enabling formation of a well region before the temporary patterns are removed.

Career Highlights

The available information identifies Huang’s work with Semiconductor Technology (Hangzhou) Ltd. and documents his contribution to semiconductor device fabrication. The patent focuses on gate formation and well implantation within a semiconductor substrate.

Collaborations

Huang’s listed coworkers include Zheng Lv and Xunyi Song. The provided information does not specify their roles in the patent or the extent of their collaboration.

Conclusion

Chihsen Huang’s documented patent work addresses a semiconductor manufacturing process that combines patterned gate formation with well-region implantation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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