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Chih-Wei Yao

This inventor holds 29 USPTO granted patents and 3 published patent applications. Top assignees: Samsung Electronics Co., Ltd., Marvell International Limited, Marvellworld Trade Ltd.. Active years: 2010-2025.

USPTO Granted Patents = 29 (Patent Applications = 3)

% Patents Active = 82.8

Average Co-Inventor Count = 1.8

ph-index = 7

Forward Citations = 146(Granted Patents)

Location History:

Milpitas, CA (US) (2010 - 2015)
Sunnyvale, CA (2020)
Sunnyvale, CA (US) (2014 - 2022)
Saratoga, CA (US) (2021 - 2022)

Company Filing History:

21 out of 132,107

Samsung Electronics Co., Ltd.

patents

4 out of 5,162

Marvell International Limited

patents

3 out of 1,901

Marvellworld Trade Ltd.

Years Active: 2010-2025

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29 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12425275 - Hybrid source-series termination driver with constant output swing (2025-09-23),

2. 11431344 - Apparatus and method for automatic search of sub-sampling phase locked loop (SS-PLL) locking acquisition (2022-08-30),

3. 11233627 - System and method for providing fast-settling quadrature detection and correction (2022-01-25),

4. 11175633 - System and method for fast-converging digital-to-time converter (DTC) gain calibration for DTC-based analog fractional-N phase lock loop (PLL) (2021-11-16),

5. 11115005 - Ring voltage controlled oscillator (VCO) startup helper circuit (2021-09-07),

6. 11063599 - Apparatus and method for automatic search of sub-sampling phase locked loop (SS-PLL) locking acquisition (2021-07-13),

7. 11050428 - Synchronous sampling in-phase and quadrature-phase (I/Q) detection circuit (2021-06-29),

8. 10996634 - System and method for fast-converging digital-to-time converter (DTC) gain calibration for DTC-based analog fractional-N phase lock loop (PLL) (2021-05-04),

9. 10965297 - Sigma-delta modulation quantization error reduction technique for fractional-N phase-locked loop (PLL) (2021-03-30),

10. 10917078 - System and method for fast converging reference clock duty cycle correction for digital to time converter (DTC)-based analog fractional-N phase-locked loop (PLL) (2021-02-09),

11. 10841072 - System and method for providing fast-settling quadrature detection and correction (2020-11-17),

12. 10812088 - Synchronous sampling in-phase and quadrature-phase (I/Q) detection circuit (2020-10-20),

13. 10623010 - System and method of calibrating input signal to successive approximation register (SAR) analog-to-digital converter (ADC) in ADC-assisted time-to- digital converter (TDC) (2020-04-14),

14. 10581418 - System and method for fast converging reference clock duty cycle correction for digital to time converter (DTC)-based analog fractional-N phase-locked loop (PLL) (2020-03-03),

15. 10418981 - System and method for calibrating pulse width and delay (2019-09-17),

Title: The Innovative Journey of Chih-Wei Yao

Introduction: Chih-Wei Yao, a talented inventor based in Sunnyvale, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Chih-Wei Yao holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his expertise in cutting-edge technologies.

Career Highlights: With a background in computer science and engineering, Chih-Wei Yao has worked for top tech companies, leading research institutions, and universities, where he has spearheaded projects that have revolutionized the industry.

Collaborations: Throughout his career, Chih-Wei Yao has collaborated with renowned scientists, engineers, and researchers, fostering a culture of innovation and knowledge-sharing in the tech community.

Conclusion: Chih-Wei Yao's passion for pushing the boundaries of technology and his relentless pursuit of excellence continue to inspire the next generation of inventors and innovators worldwide.

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