Chih Hsien Weng

Title: Chih Hsien Weng: Innovator in Packet Transmission and Clock Output Technologies

Introduction

Chih Hsien Weng is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of technology, particularly in the areas of packet transmission and clock output circuits. With a total of 2 patents to his name, Weng continues to push the boundaries of innovation.

Latest Patents

Weng's latest patents include a "Method and device for coordinating packet transmission order" and a "Glitchless clock output circuit and the method for the same." The first patent discloses a method for coordinating packet transmission order for multiple registers of different priority levels. This method ensures that packets are transmitted according to their priority levels under normal conditions. A count value is generated in response to the transmitted packets, and when this count exceeds a predetermined threshold, the system switches to a cleaning condition. This allows for efficient management of packet transmission from registers with lower priority levels. The second patent focuses on generating a variable delay clock without glitches. It involves a DLL clock output circuit that utilizes a selection circuit to produce a glitchless variable delay clock signal.

Career Highlights

Chih Hsien Weng is currently employed at Via Technologies, Inc., where he applies his expertise in developing innovative technologies. His work has significantly impacted the efficiency and reliability of electronic systems.

Collaborations

Weng collaborates with talented individuals such as Cheng-Yuan Wu and Chen-Hua Hsi, contributing to a dynamic and innovative work environment.

Conclusion

Chih Hsien Weng is a notable inventor whose work in packet transmission and clock output technologies showcases his commitment to innovation. His contributions continue to influence the technological landscape, making him a key figure in his field.