This inventor holds 1 USPTO granted patent. Top assignees: Synopsys Taiwan Co., Ltd., Synopsys, Inc.. Active years: 2014.
Company Filing History:


Years Active: 2014
Title: Chien-Fu Chung: Innovator in Integrated Circuit Design
Introduction
Chien-Fu Chung is a notable inventor based in Yunlin, Taiwan. He has made significant contributions to the field of integrated circuit (IC) design, particularly through his innovative patent that enhances the layout generation process.
Latest Patents
Chien-Fu Chung holds a patent titled "Parameterized cell layout generation guided by a design rule checker." This patent describes a method for generating a layout for a cell of an integrated circuit guided by design rule checking (DRC). The method involves defining a model with multiple parameters for layout generation. An initial layout is created based on an initial set of parameter values, followed by DRC to identify any violations. If violations are detected, reports are generated, allowing for the adjustment of parameter values. This iterative process continues until a 'DRC clean' layout is achieved.
Career Highlights
Throughout his career, Chien-Fu Chung has worked with prominent companies in the semiconductor industry, including Synopsys, Inc. and Synopsys Taiwan Co., Ltd. His experience in these organizations has contributed to his expertise in IC design and layout generation.
Collaborations
Chien-Fu Chung has collaborated with talented individuals in his field, including Yuan-Kai Pei and Shyh-An Tang. These collaborations have likely enriched his work and contributed to advancements in integrated circuit technology.
Conclusion
Chien-Fu Chung's innovative approach to integrated circuit design through his patented method showcases his significant contributions to the field. His work continues to influence the development of efficient and reliable IC layouts.