Chia-Yen Ho

Title: Innovator Spotlight: Chia-Yen Ho from New Taipei, Taiwan

Introduction: Chia-Yen Ho is a prominent inventor based in New Taipei, Taiwan, known for his contributions to wafer processing technology. With two patents to his name, he has made significant strides in improving the efficiency and precision of semiconductor manufacturing processes.

Latest Patents: Chia-Yen Ho's latest patents focus on the process of planarizing a wafer with large step heights and surface area features. The innovative technique involves the conformal formation of a blanket stop layer on a layer with substantial step heights. The process includes two chemical mechanical polishing steps: removing the blanket stop layer atop the raised regions and then using that layer or the underlying layer as a stop layer during the planarization process. This method ensures that the raised layers can be efficiently removed without causing dishing in the non-raised areas, which are safeguarded by the blanket stop layer.

Career Highlights: Chia-Yen Ho has built a successful career at Nan Ya Technology Corporation, where he applies his expertise in semiconductor technology. His work is instrumental in advancing manufacturing practices in the industry, thereby contributing to the overall improvement of semiconductor device fabrication.

Collaborations: Throughout his career, Chia-Yen Ho has collaborated with notable colleagues, including Brett W. Busch and Gowri Damarla. These collaborations underscore the importance of teamwork in driving technological innovations within the field.

Conclusion: Chia-Yen Ho exemplifies the spirit of innovation and collaboration in the semiconductor industry. His patents reflect an ongoing commitment to enhancing manufacturing processes, positioning him as a key figure in advancing wafer processing technology. As the industry continues to evolve, his contributions will undoubtedly influence future developments in semiconductor manufacturing.