Hsinchu, Taiwan

Chia-Tung Hsu

This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2022-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chia-Tung Hsu. Retrieved from https://idiyas.com/inventor/chia-tung-hsu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Location History:

  • Hsinchu, TW (2022)
  • Taichung, TW (2024)

Company Filing History:


Years Active: 2022-2024

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3 patents (USPTO):Explore Patents

Title: Chia-Tung Hsu: Innovator in Semiconductor Technology

Introduction

Chia-Tung Hsu, an esteemed inventor based in Hsinchu, Taiwan, has made significant contributions to the field of semiconductor technology. With a total of three patents to his name, he has demonstrated a commitment to advancing innovations within this critical industry.

Latest Patents

Hsu's latest patents showcase his expertise in semiconductor structures. One notable patent describes a semiconductor structure that consists of a conductive line, a pad layer, and a barrier layer. The conductive line is strategically embedded within a multi-level interconnect structure. The pad layer is positioned above the conductive line, while the barrier layer interconnects the two, comprising a first and a second poly-crystalline layer, separated by a boundary.

Another invention from Hsu encompasses a semiconductor structure that integrates a multi-level interconnect structure, a passivation layer, a barrier layer, and a pad layer. This innovative design features a barrier layer that lines the inner sidewall of the passivation layer, alongside the top surfaces of both the passivation layer and the conductive line. The barrier consists of four distinct layers, each in varying phases: a first layer in a nano-crystalline phase, a second layer in an amorphous phase, a third layer in a polycrystalline phase, and a fourth layer that returns to a nano-crystalline phase. This complex structure enhances performance and reliability in semiconductor applications.

Career Highlights

Hsu's impressive career includes his role at Taiwan Semiconductor Manufacturing Company Ltd. (TSMC), where he has collaborated on cutting-edge projects. His innovative mindset and technical expertise have positioned him as a thought leader in the semiconductor domain, contributing to TSMC’s reputation as a global leader in semiconductor manufacturing.

Collaborations

Working alongside talented coworkers such as Ya-Chin Chiu and Ming-Hsien Lin, Hsu has fostered a collaborative environment that encourages innovation and the exchange of ideas. Together, they have contributed to numerous advancements in semiconductor technology, further solidifying their standing in the industry.

Conclusion

Chia-Tung Hsu's dedication to innovation in semiconductor structures is evident through his valuable patents and collaborative efforts. His work not only enhances the operational efficiency of semiconductor devices but also reflects the dynamic advancements within the technology sector in Taiwan. As an influential figure at TSMC, Hsu continues to pave the way for future innovations that will shape the landscape of semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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