This inventor holds 1 USPTO granted patent. Top assignees: Mfdiatek Inc., National Taiwan University. Active years: 2021.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:

Years Active: 2021
Title: Cheng-Yen Lin: Innovator in Compiler Optimization
Introduction
Cheng-Yen Lin is a notable inventor based in Chiayi, Taiwan. He has made significant contributions to the field of compiler optimization, particularly through his innovative patent that addresses energy efficiency in multithreaded computing.
Latest Patents
Cheng-Yen Lin holds a patent titled "Probabilistic framework for compiler optimization with multithread power-gating controls." This patent introduces a probabilistic framework that optimizes compiler performance by scheduling thread fragments of multithread computer code based on estimated execution times. The framework logs time stamps of events and sorts them to construct time slices. It determines power-gating times for components, allowing for reduced energy consumption by inserting predicated power-gating instructions into the code.
Career Highlights
Throughout his career, Cheng-Yen Lin has worked with esteemed institutions such as National Taiwan University and MediaTek Inc. His work has focused on enhancing the efficiency of computing systems through innovative software solutions.
Collaborations
Cheng-Yen Lin has collaborated with notable colleagues, including Jenq-Kuen Lee and Ming-Yu Hung. Their combined expertise has contributed to advancements in compiler optimization and energy-efficient computing.
Conclusion
Cheng-Yen Lin's contributions to compiler optimization and energy efficiency in computing highlight his role as an influential inventor in the technology sector. His innovative approaches continue to impact the field positively.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile