Taipei, Taiwan

Cheng-Ya Yu

This inventor holds 1 USPTO granted patent. Top assignee: National Taiwan University. Active years: 2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Cheng-Ya Yu. Retrieved from https://idiyas.com/inventor/cheng-ya-yu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2007

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1 patent (USPTO):Explore Patents

Title: Cheng-Ya Yu: Innovator in Mechanically Strained Silicon Technology

Introduction

Cheng-Ya Yu is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of integrated circuits through his innovative methods. His work focuses on enhancing the speed of integrated circuits or devices using mechanically strained silicon.

Latest Patents

Cheng-Ya Yu holds a patent for a method with mechanically strained silicon for enhancing the speeds of integrated circuits or devices. This patent outlines a systematic approach that includes several steps: providing a substrate, fixing the substrate, applying stress upon the substrate, and inducing strain in either a device or a circuit by stressing the substrate. This innovative method aims to improve the performance of integrated circuits significantly.

Career Highlights

Cheng-Ya Yu is affiliated with National Taiwan University, where he continues to advance research in semiconductor technology. His work has garnered attention for its potential applications in various electronic devices, making him a key figure in the field.

Collaborations

Cheng-Ya Yu has collaborated with notable colleagues, including Sun-Rong Jan and Shu-Tong Chang. These partnerships have contributed to the development of cutting-edge technologies in the realm of integrated circuits.

Conclusion

Cheng-Ya Yu's contributions to the field of integrated circuits through his innovative methods highlight his role as a leading inventor. His work not only enhances the performance of electronic devices but also paves the way for future advancements in semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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