Kuala Lumpur, Malaysia

Chee Wai Wong


Average Co-Inventor Count = 2.0

ph-index = 2

Forward Citations = 10(Granted Patents)


Location History:

  • Wilayah P., MY (2008)
  • Kuala Lumpur, MY (2007 - 2010)

Company Filing History:


Years Active: 2007-2010

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3 patents (USPTO):Explore Patents

Title: Chee Wai Wong: Innovator in Integrated Circuit Packaging

Introduction

Chee Wai Wong is a notable inventor based in Kuala Lumpur, Malaysia. He has made significant contributions to the field of integrated circuit packaging, holding a total of 3 patents. His work focuses on improving the efficiency and effectiveness of integrated circuit die configurations.

Latest Patents

One of his latest patents involves an innovative integrated circuit die configuration for packaging. This patent details terminal arrangements and configurations for mounting an integrated circuit die on a package substrate to reduce package transmission paths. In one embodiment, terminals for signals sensitive to trace length outside a die are arranged at the corners of the die. The die is mounted on a package substrate at an angle to point the corners of the die at the edges of the package substrate, thereby reducing trace length outside the die. The center of the die may or may not coincide with the center of the substrate. Notably, when compared to a centered, non-rotated die mounting position, this method does not cause significant differences in substrate warpage.

Career Highlights

Chee Wai Wong is currently employed at Intel Corporation, where he continues to innovate in the field of integrated circuits. His work has been instrumental in advancing the technology used in modern electronics.

Collaborations

He collaborates with talented coworkers, including Chee Hoo Lee and Cheng Siew Tay, to further enhance the development of integrated circuit technologies.

Conclusion

Chee Wai Wong's contributions to integrated circuit packaging demonstrate his commitment to innovation and excellence in technology. His patents reflect a deep understanding of the complexities involved in circuit design and packaging.

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