Che-Yu Lee

Title: Che-Yu Lee and His Electronic Packaging Invention.

Introduction

Che-Yu Lee is an inventor associated with Taichung, Taiwan, and Siliconware Precision Industries, Ltd. His patent work addresses electronic packaging and the manufacturing processes used to produce electronic elements in different sizes.

Latest Patents

Lee is associated with 1 patent, titled “Electronic Package Having a Chip with a Trench in the Surface.” The patent describes an electronic package and a manufacturing method that begins with a full-panel wafer containing an array of spaced electronic bodies. Trenches are formed across the bodies in one direction, while multiple trenches on each body run parallel to one another in a perpendicular direction. During singulation, a selected trench can be used as a cutting path to produce electronic elements of a required size. Each element is then placed on a packaging region of a carrier structure and electrically connected to at least some of its contact pads.

Career Highlights

Lee’s disclosed invention focuses on flexibility in singulation: selecting among trench paths allows electronic elements of different required sizes to be produced from the same full-panel wafer. The approach connects wafer processing with the subsequent placement and electrical connection of each element in a package.

Collaborations

Lee is associated with Siliconware Precision Industries, Ltd. His listed coworker is fellow inventor Chao-Chiang Pu.

Conclusion

Che-Yu Lee’s patent presents a wafer-based packaging method designed to support flexible element sizing and electrical integration on a carrier structure.