Hsinchu, Taiwan

Chao-Hu Liang

This inventor holds 3 USPTO granted patents. Top assignee: United Microelectronics Corp.. Active years: 2007-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chao-Hu Liang. Retrieved from https://idiyas.com/inventor/chao-hu-liang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 2007-2009

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3 patents (USPTO):Explore Patents

Title: Chao-Hu Liang: Innovator in Semiconductor Manufacturing

Introduction

Chao-Hu Liang is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor manufacturing, holding a total of 3 patents. His work focuses on methods that enhance the efficiency and reliability of integrated circuits.

Latest Patents

One of Chao-Hu Liang's latest patents is a method of reducing charging damage to integrated circuits during semiconductor manufacturing. This patent describes an integrated circuit die that includes a first device region, a second device region, and a non-active region. A first implant mask is formed over the semiconductor substrate, covering the second device region and the non-active region while exposing the first device region. Dopant species are implanted into the exposed semiconductor substrate within the first device region to create first doping regions. Additionally, a second implant mask is formed, covering the first device region while exposing the second device region and a portion of the non-active region, allowing for the implantation of dopant species into the second active device region.

Another patent by Liang also focuses on reducing charging damage during semiconductor manufacturing. This patent involves a semiconductor substrate with an integrated circuit die area surrounded by a scribe lane. Within this area, a first trench isolation region and a second trench isolation region are formed. The first trench isolation region isolates a first active device region from a second active device region, while the second trench isolation region includes trench dummy features to reduce loading effects. A first gate electrode is formed on the first active device region, and a second gate electrode is formed on the second active device region, followed by an ion implantation process to implant dopant species into the second active device region.

Career Highlights

Chao-Hu Liang is currently employed at United Microelectronics Corporation, a leading company in the semiconductor industry. His innovative approaches and patents have contributed to advancements in semiconductor technology, making him a valuable asset to his organization.

Collaborations

Throughout his career, Liang has collaborated with notable colleagues, including Ko-Ting Chen and Wen-Bin Lu. These collaborations have further enhanced his research and development efforts in the semiconductor field.

Conclusion

Chao-Hu Liang is a distinguished inventor whose work in semiconductor manufacturing has led to significant advancements in integrated circuit technology. His patents reflect his commitment to innovation and excellence in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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