Hsinchu, Taiwan

Chao-Hsiang Leu


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 2008-2009

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2 patents (USPTO):Explore Patents

Title: Innovations by Chao-Hsiang Leu

Introduction

Chao-Hsiang Leu is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor packaging, holding a total of 2 patents. His work focuses on enhancing the reliability and efficiency of semiconductor devices.

Latest Patents

One of his latest patents is a "Window-type semiconductor package to avoid peeling at moldflow entrance." This innovative design includes a substrate, a chip with its active surface attached to the substrate, and a die-attaching layer that bonds the chip to the substrate core. The design features a slot with moldflow blocking lumps to prevent peeling at the moldflow entrance, ensuring a consistent die-attaching gap.

Another significant patent is the "IC package encapsulating a chip under asymmetric single-side leads." This multi-chip IC package utilizes asymmetric longer single-side leads and includes a plurality of die-attach tape strips. The design enhances the encapsulated area of the first chip, thereby improving the product reliability of the semiconductor package.

Career Highlights

Chao-Hsiang Leu is currently employed at Powertech Technology Inc., where he continues to innovate in semiconductor technology. His work has been instrumental in developing advanced packaging solutions that address common challenges in the industry.

Collaborations

He collaborates with talented coworkers such as Tseng-Shin Chiu and Chia-Yu Hung, contributing to a dynamic team focused on pushing the boundaries of semiconductor technology.

Conclusion

Chao-Hsiang Leu's contributions to semiconductor packaging through his innovative patents demonstrate his expertise and commitment to advancing technology in this field. His work not only enhances product reliability but also sets a standard for future developments in semiconductor design.

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