The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2008
Filed:
Dec. 22, 2006
Chia-yu Hung, Hsinchu, TW;
Chao-hsiang Leu, Hsinchu, TW;
Tseng-shin Chiu, Hsinchu, TW;
Powertech Technology Inc., Hsinchu, TW;
Abstract
A multi-chip IC package encapsulates a chip under asymmetric longer single-side leads. The package mainly comprises a plurality of leads that have asymmetric length at two sides of a leadframe, a plurality of die-attach tape strips, a first chip having a plurality of single-side pads under the longer side leads, at least a second chip disposed above the longer side leads, a plurality of bonding wires and a molding compound. The die-attach tape strips are mutually parallel and adhered onto the lower surfaces of the longer side leads to adhere the first chip. There is at least a mold-flow channel formed through the first chip, the longer side leads and the die-attach tape strips. The bonding wires electrically connect the single-side pads of the first chip to the leads at the two sides of the leadframe through a non-central gap. The molding compound encapsulates the first chip, the second chip, the bonding wires and portions of the leads at the two sides of the leadframe and fills up the mold-flow channel. The mold-flow channel formed by means of the die-attach tape strips may increase the encapsulated area of the first chip by the molding compound to enhance product reliability of semiconductor package.