Hsinchu, Taiwan

Chao-Hsi Chung


Average Co-Inventor Count = 1.6

ph-index = 1

Forward Citations = 9(Granted Patents)


Location History:

  • Jhibei, TW (2007 - 2008)
  • Hsinchu County, TW (2007 - 2008)
  • Hsinchu, TW (2005 - 2012)

Company Filing History:


Years Active: 2005-2012

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6 patents (USPTO):Explore Patents

Title: Chao-Hsi Chung: Innovator in Semiconductor Technology

Introduction

Chao-Hsi Chung is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 6 patents. His innovative approaches have paved the way for advancements in capacitor fabrication and semiconductor device design.

Latest Patents

Chung's latest patents include a method for fabricating a crown-shaped capacitor. This method involves providing a first dielectric layer with a protective pillar formed thereover, including a first conductive layer, a protective layer, and a mask layer. A second conductive layer is formed over a sidewall of the protective pillar. The process continues with the formation of a first capacitance layer and a third conductive layer over the first dielectric layer. A sacrificial layer is then formed over the third conductive layer, followed by the partial removal of several layers to create a recess adjacent to the first capacitance layer. The protective layer is removed to expose the first and second conductive layers, allowing for the formation of a second capacitance layer and a fourth conductive layer in the opening. Finally, the sacrificial layer is removed to reveal the third conductive layer.

Another notable patent is a fabrication method for single and dual gate spacers on a semiconductor device. This method begins with a substrate that has an array area with a first gate and a peripheral area with a second gate. First and second isolation layers made of different materials are sequentially formed to cover both gates and the substrate. The process includes the removal of a portion of the second isolation layer to form spacers on the sidewalls of the gates and expose the first isolation layer on the top of both gates and the substrate surface. The spacers on the first isolation layer in the array area are then removed, leading to the removal of the first isolation layer on the top of the first gate and the substrate surface.

Career Highlights

Chao-Hsi Chung has worked with several notable companies, including Promos Technologies, Inc. and Taiwan Memory Corporation. His experience in these organizations has contributed to his expertise in semiconductor technologies and innovations.

Collaborations

Chung has collaborated with talented individuals such as Jung-Wu Chien and Su-Chen Lai. These partnerships have fostered a creative environment that has led to significant advancements in their respective fields.

Conclusion

Chao

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