Seoul, South Korea

Chang Eun Jang

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Asicland Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chang Eun Jang. Retrieved from https://idiyas.com/inventor/chang-eun-jang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Chang Eun Jang: Innovator in Integrated Circuit Optimization

Introduction

Chang Eun Jang is a prominent inventor based in Seoul, South Korea. He has made significant contributions to the field of integrated circuit design, particularly through his innovative approaches to optimizing circuit layouts.

Latest Patents

Chang Eun Jang holds a patent for a "System and method for optimizing integrated circuit layout based on neural network." This patent discloses a system that includes a placement information generation unit, a placement information filtering unit, and an EDA tool control unit. The system generates placement information for circuit blocks and optimizes the layout based on neural network predictions, ensuring efficient use of substrate area and performance metrics.

Career Highlights

Chang Eun Jang is currently employed at Asicland Co., Ltd., where he continues to develop cutting-edge technologies in integrated circuit design. His work focuses on enhancing the efficiency and performance of electronic devices through innovative layout optimization techniques.

Collaborations

Chang has collaborated with Jong Min Lee, a fellow innovator in the field. Together, they have worked on projects that push the boundaries of integrated circuit technology.

Conclusion

Chang Eun Jang's contributions to the field of integrated circuit optimization highlight his role as a leading inventor in the industry. His innovative patent demonstrates the potential of neural networks in enhancing electronic design processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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