Noida, India

Chandan Kumar

This inventor holds 1 USPTO granted patent. Top assignee: Synopsys, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chandan Kumar. Retrieved from https://idiyas.com/inventor/chandan-kumar-nf93p21r

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Chandan Kumar: Innovator in Circuit Design and Risk Assessment

Introduction

Chandan Kumar is a notable inventor based in Noida, India. He has made significant contributions to the field of circuit design, particularly in the area of threat analysis and risk assessment. His innovative approach has led to the development of a unique patent that addresses critical vulnerabilities in circuit elements.

Latest Patents

Chandan Kumar holds a patent titled "Identifying circuit elements and/or ports for threat analysis and risk assessment." This invention involves receiving a first set of ports and/or circuit elements in a circuit design that may cause damage if compromised. By performing forward and backward path tracing, a second set of ports and/or circuit elements is determined. A report generated from this analysis aids in performing threat analysis and risk assessment for the circuit design. He has 1 patent to his name.

Career Highlights

Chandan Kumar is currently employed at Synopsys, Inc., where he continues to innovate and contribute to advancements in circuit design. His work focuses on enhancing the security and reliability of electronic systems.

Collaborations

Chandan collaborates with Fadi Maamari, leveraging their combined expertise to push the boundaries of technology in their field.

Conclusion

Chandan Kumar's contributions to circuit design and risk assessment highlight his role as a key innovator in the industry. His patent reflects a commitment to improving the safety and integrity of electronic systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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