Morgan Hill, CA, United States of America

Bruce Schwegler

This inventor holds 1 USPTO granted patent. Top assignee: Integrated Device Technology, Inc.. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Bruce Schwegler. Retrieved from https://idiyas.com/inventor/bruce-schwegler

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 14(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: The Innovations of Bruce Schwegler

Introduction

Bruce Schwegler is an accomplished inventor based in Morgan Hill, California. He has made significant contributions to the field of integrated circuit technology. His innovative work has led to the development of a patented circuit board assembly and packaged integrated circuit device.

Latest Patents

Schwegler holds a patent for a "Circuit board assembly and packaged integrated circuit device with power and ground channels." This invention includes a semiconductor die and a package substrate featuring a grid array of contact pads. These contact pads are electrically coupled to corresponding pads on the semiconductor die, facilitating efficient power and ground channel management.

Career Highlights

Bruce Schwegler is associated with Integrated Device Technology, Inc., where he has been instrumental in advancing circuit board technology. His work focuses on enhancing the performance and reliability of integrated circuits through innovative designs.

Collaborations

Throughout his career, Schwegler has collaborated with notable colleagues, including Kee W Park and Jeff Vesey. These partnerships have contributed to the successful development of his patented technologies.

Conclusion

Bruce Schwegler's contributions to integrated circuit technology exemplify the spirit of innovation. His patent reflects a commitment to improving electronic device performance and reliability.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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