Saratoga, CA, United States of America

Bruce J Chang

USPTO Granted Patents = 5 

Average Co-Inventor Count = 2.3

ph-index = 2

Forward Citations = 96(Granted Patents)


Company Filing History:


Years Active: 2009-2019

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5 patents (USPTO):Explore Patents

Title: Bruce J Chang: Innovator in Multi-Core Processor Technology

Introduction

Bruce J Chang is a notable inventor based in Saratoga, CA (US). He has made significant contributions to the field of multi-core processors, holding a total of 5 patents. His work focuses on enhancing system performance and reducing latencies in data processing.

Latest Patents

One of his latest patents is titled "Acceleration and dynamic allocation of random data bandwidth in multi-core processors." This invention outlines systems and methods for dynamically allocating random data bandwidth among requesting cores in multi-core processors. The technology aims to reduce system latencies and enhance overall performance. In this arrangement, a multicore processor features a vertical pre-fetch random data buffer structure that continuously stores random data generated by a random data generator (RNG). This ensures that the random data is readily available for consumption by the processing cores. The design allows for efficient data handling, where random data can be automatically transferred between buffers as needed, streamlining the data fetching process.

Career Highlights

Throughout his career, Bruce has worked with prominent companies such as Oracle International Corporation and Sun Microsystems, Inc. His experience in these organizations has contributed to his expertise in processor technology and innovation.

Collaborations

Bruce has collaborated with notable colleagues, including Fred Tsai and John D Pape. Their combined efforts have further advanced the field of multi-core processing.

Conclusion

Bruce J Chang's innovative work in multi-core processor technology has significantly impacted the efficiency of data processing systems. His patents reflect a commitment to enhancing performance and reducing latencies in computing environments.

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