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For the Inventor, By the Inventor

Mission Viejo, CA, United States of America

Bruce Ernest Whittaker

This inventor holds 47 USPTO granted patents, primarily in Cache Optimization. Top assignee: Unisys Corporation. Active years: 1991-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Bruce Ernest Whittaker. Retrieved from https://idiyas.com/inventor/bruce-ernest-whittaker

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 47

% Patents Active = 97.9

Average Co-Inventor Count = 1.6

ph-index = 13

Forward Citations = 614(Granted Patents)


Location History:

  • Mission Viejo, CA (US) (1991 - 2001)
  • Lake Forest, CA (US) (2007 - 2010)

Company Filing History:

goldMedal47 out of 2,444 
 
Unisys Corporation
 patents

Years Active: 1991-2010

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Areas of Expertise:
Cache Memory
Processor Bus Traffic
Digital Device Control
Multi-Level Cache
Error Conditions
Data Transfer
Memory Operations
Reconfiguration
Initialization System
Arbitration System
47 patents (USPTO):Explore Patents
1. 7793229 - Recording relevant information in a GUI window of a panel dump browser tool (2010-09-07),
2. 7401261 - Automatic analysis of memory operations using panel dump file (2008-07-15),
3. 7171593 - Displaying abnormal and error conditions in system state analysis (2007-01-30),
4. 6295563 - Control system for recreating of data output clock frequency which matches data input clock frequency during data transferring (2001-09-25),
5. 6070233 - Processor bus traffic optimization system for multi-level cache (2000-05-30),
6. 6070166 - Apparatus and method for compressing a plurality of contiguous addresses (2000-05-30),
7. 6041337 - Linear function generator method with counter for implementation of (2000-03-21),
8. 6000015 - Processor bus traffic optimization system for multi-level cache (1999-12-07),
9. 5991853 - Methods for accessing coincident cache with a bit-sliced architecture (1999-11-23),
10. 5935200 - Exponential functional relationship generator method and system for (1999-08-10),
11. 5928310 - Digital device control method and system via linear function generator (1999-07-27),
12. 5889959 - Fast write initialization method and system for loading channel adapter (1999-03-30),
13. 5850513 - Processor path emulation system providing fast readout and verification (1998-12-15),
14. 5832250 - Multi set cache structure having parity RAMs holding parity bits for tag (1998-11-03),
15. 5822334 - High speed initialization system for RAM devices using JTAG loop for (1998-10-13),

Title: Bruce Ernest Whittaker - Innovative Inventor from Mission Viejo

Introduction: Bruce Ernest Whittaker is a renowned inventor based in Mission Viejo, California. With a passion for creating groundbreaking solutions, he has made significant contributions to the field of innovation.

Latest Patents: Bruce Whittaker holds several patents in various industries, including technology, healthcare, and consumer goods. His recent patents focus on enhancing user experiences and improving efficiency in everyday tasks.

Career Highlights: Throughout his career, Bruce Whittaker has been recognized for his forward-thinking approach to problem-solving. His inventions have garnered attention for their creativity and practicality, earning him a reputation as a visionary inventor.

Collaborations: Bruce Whittaker has collaborated with leading companies and research institutions to bring his inventions to life. His partnerships have led to the development of cutting-edge products that have had a positive impact on society.

Conclusion: Bruce Ernest Whittaker's dedication to innovation and his ability to think outside the box have established him as a prominent figure in the world of inventors. His continued pursuit of excellence promises a future filled with exciting new inventions that will shape the way we live and work.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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