New Taipei City, Taiwan

Brian Huang

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Arteris, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Brian Huang. Retrieved from https://idiyas.com/inventor/brian-huang-czxfht92

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Brian Huang and His Patent on Interleaved Memory

Introduction

Brian Huang is an inventor associated with Arteris, Inc. and based in New Taipei City, Taiwan. His patent work addresses memory-system design, including efficient ways to distribute memory accesses across interleaved channels.

Latest Patents

Huang is listed as an inventor on 1 patent: “Modulo Operations for Interleaved Memory Having Non-Power-of-Two Channels.” The invention concerns an electronic system with system memory divided into N interleaved channels, where N is not a power of two. It describes processing an M-bit memory address to calculate its modulo N without performing division by N, then using the result to select the channel to access. This approach is designed to support channel selection in systems with non-power-of-two channel counts.

Career Highlights

Huang’s listed patent reflects work on hardware methods for memory addressing and channel selection. The available information identifies Arteris, Inc. as his company.

Collaborations

Hao Luan is identified as Huang’s coworker. The patent information provided does not specify whether Luan collaborated with him on this invention.

Conclusion

Brian Huang’s patent focuses on calculating memory-channel selection efficiently when a system uses a non-power-of-two number of interleaved channels.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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