Half Moon Bay, CA, United States of America

Brady L Keays

This inventor holds 40 USPTO granted patents and 2 published patent applications and 2 EPO patents, primarily in Memory Systems. Top assignee: Micron Technology Incorporated. Active years: 2003-2026.

USPTO Granted Patents = 40 

% Patents Active = 87.5


Average Co-Inventor Count = 1.7

ph-index = 11

Forward Citations = 432(Granted Patents)


Location History:

  • Half Moon Bay, CA (US) (2003 - 2016)
  • Kuna, ID (US) (2024)

Company Filing History:


Years Active: 2003-2026

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Areas of Expertise:
NAND Translation
Error Correction
Memory Device
Data Handling
Program Failure
Erase Block
Non-Volatile Memory
Data Management
Flash Memory
Data Recovery
Error Detection
Coded Correction
40 patents (USPTO):Explore Patents

Title: **Innovations and Patents of Brady L. Keays**

Introduction

Brady L. Keays is an accomplished inventor based in Half Moon Bay, CA, who holds a remarkable portfolio of 39 patents. His contributions primarily focus on innovations in memory systems, where he has developed groundbreaking techniques that enhance the efficiency and reliability of data management.

Latest Patents

Brady Keays has recently patented several innovative technologies, including:

1. **Techniques for Managed NAND Translation with Embedded Memory Systems**: This patent describes methods, systems, and devices that enable a host system to access logical memory addresses associated with a memory system effectively. It involves identifying a physical memory address through a command generation process and communicating commands to the memory device via a specific protocol. This innovation significantly improves the way memory cells are accessed based on received commands, leading to better overall system performance.

2. **Non-Systematic Coded Error Correction**: In this patent, methods are introduced that facilitate the detection and correction of data in memory devices. By employing a non-systematic ECC code for encoding data bits, this approach streamlines the detection and correction hardware requirements. It enhances data security by preventing user data from being stored in plaintext within the memory array. The distribution of the ECC code throughout the stored data bolsters its robustness against damage or data corruption.

Career Highlights

Brady Keays currently works at Micron Technology Incorporated, a leading company in the semiconductor industry known for its innovative memory and storage solutions. His extensive experience and contributions to patent development underscore his reputation as a knowledgeable inventor in the field of technology.

Collaborations

Throughout his career, Brady has collaborated with notable colleagues such as William Henry Radke and Shuba Swaminathan. These partnerships have led to advancements in memory technology, highlighting the importance of teamwork in driving innovation forward.

Conclusion

Brady L. Keays continues to be a significant figure in the realm of memory system innovations. With a solid track record of patents addressing critical issues in data management and security, his work will undoubtedly influence the future of technology and contribute to advancements in memory systems for years to come.

Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
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